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A slipstream processor is an architecture designed to reduce the length of a running program by removing the non-essential instructions. It is a form of speculative computing. Non-essential instructions include such things as results that are not written to memory, or compare operations that will always return true. Also as statistically most branch instructions will be taken it makes sense to assume this will always be the case. Because of the speculation involved slipstream processors are generally described as having two parallel executing streams. One is an optimized faster A-stream executing the reduced code, the other is the slower R-stream which runs behind the A-stream and executes the full code. The R-stream runs faster than if it were a single stream due to data being prefetched by the A-stream effectively hiding memory latency, and due to the A-stream's assistance with branch prediction. The two streams both complete faster than a single stream would. As of 2005, theoretical studies have shown that this configuration can lead to a speedup of around 20%. The main problem with this approach is accuracy: as the A-stream becomes more accurate and less speculative, the overall system runs slower. Furthermore, a large enough distance is needed between the A-stream and the R-stream so that cache misses generated by the A-stream do not slow down the R-stream. == References == * Z. Purser, K. Sundaramoorthy and E. Rotenberg, "(A Study of Slipstream Processors )", Proc. 33rd Ann. Int'l Symp. Microarchitecture, Monterey, CA, Dec. 2000. 抄文引用元・出典: フリー百科事典『 ウィキペディア（Wikipedia）』 ■ウィキペディアで「Slipstream (computer science)」の詳細全文を読む スポンサード リンク
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